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Proving the correctness of the interlock mechanism in processor design.
(Chapman & Hall on behalf of the International Federation for Information Processing (IFIP), 1997)
In this paper, Interval Temporal Logic (ITL) us used to specify and verify the event processor EP/3, which is a multi-threaded pipeline processor capable of executing parallel programs. We first give the high level ...
Refining interval temporal logic specifications
Interval Temporal Logic (ITL) was designed as a tool for the specification and verification of systems. The development of an executable subset of ITL, namely Tempura, was an important step in the use of temporal logic as ...