Using ITL and Tempura for large scale specification and simulation.

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dc.contributor.author Cau, A. (Antonio)
dc.contributor.author Zedan, Hussein
dc.contributor.author Coleman, Nick
dc.contributor.author Moszkowski, B. C.
dc.date.accessioned 2005-09-05T19:09:57Z
dc.date.available 2005-09-05T19:09:57Z
dc.date.issued 1996
dc.identifier.citation Cau, Antonio, Zedan, Hussein, Coleman, Nick and Moszkowski, Ben, Using ITL and Tempura for large scale specification and simulation. In: Proceedings of the fourth Euromicro Workshop on Parallel and Distributed Processing - PDP '96 -, January 24-26, 1996, Braga, Portugal. Los Alamitos, Calif.: IEEE Computer Society Press, 1996, pp 493-500 en
dc.identifier.isbn 0818673761
dc.identifier.other IR/2005/19
dc.identifier.uri http://hdl.handle.net/2086/42
dc.description.abstract ITL and Tempura are used for respectively the formal specification and simulation of a large scale system, namely the general purpose multi-threaded dataflow processor EP/3. This paper shows that this processor can be specified concisely within ITL and simulated with Tempura. But it also discusses some problems encountered during the specification and simulation, and indicates what should be added to solve those problems. en
dc.description.sponsorship Supported by EPSRC Research Grant GR/K25922 en
dc.description.statementofresponsibility Nick Coleman - full name J. Nick Coleman
dc.format.extent 265957 bytes
dc.format.extent 458226 bytes
dc.format.mimetype application/pdf
dc.format.mimetype application/postscript
dc.language.iso en en
dc.publisher IEEE en
dc.relation.ispartofseries STRL en
dc.relation.ispartofseries 1996-1 en
dc.subject EPSRC en
dc.title Using ITL and Tempura for large scale specification and simulation. en
dc.type Book chapter en
dc.researchgroup Software Technology Research Laboratory (STRL)


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