The effect of gate-bias stress and temperature on the performance of ZnO thin-film transistors.

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dc.contributor.author Cross, R. B. M.
dc.contributor.author De Souza, M. M.
dc.date.accessioned 2010-01-28T09:16:41Z
dc.date.available 2010-01-28T09:16:41Z
dc.date.issued 2008
dc.identifier.citation Cross, R. B. M. and De Souza, M. M. (2008) The effect of gate-bias stress and temperature on the performance of ZnO thin-film transistors. IEEE Transactions on Device and Materials Reliability, 8 (2), pp. 277-282. en
dc.identifier.issn 1530-4388
dc.identifier.uri http://hdl.handle.net/2086/3251
dc.language.iso en en
dc.publisher IEEE en
dc.title The effect of gate-bias stress and temperature on the performance of ZnO thin-film transistors. en
dc.type Article en
dc.identifier.doi http://dx.doi.org/10.1109/TDMR.2008.916307


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